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GS8161Z18DGT-200V

Name: GSI Technology GS8161Z18DGT-200V
Brand: GSI Technology
SKU: 464-GS8161Z18DGT200V
Price: 813462 IDR
Availability: OutOfStock

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Mouser No:

464-GS8161Z18DGT200V

Mfr. No:

GS8161Z18DGT-200V

Mfr.:

GSI Technology

Description:

SRAM 1.8/2.5V 1M x 18 18M

Datasheet:

GS8161Z18DGT-200V Datasheet (PDF)

ECAD Model:

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Learn more about GSI Technology GS8161Z18DGT-200V

Availability

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Pricing (IDR)

Qty.	Unit Price	Ext. Price
	Rp813.462	Rp813.462
	Rp795.849	Rp7.958.490
	Rp676.234	Rp12.172.212
	Rp668.895	Rp36.120.330
	Rp648.531	Rp70.041.348
	Rp633.671	Rp159.685.092
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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	GSI Technology
Product Category:	SRAM
RoHS:
Memory Size:	18 Mbit
Organisation:	1 M x 18
Access Time:	6.5 ns
Maximum Clock Frequency:	200 MHz
Interface Type:	Parallel
Supply Voltage - Max:	2.7 V
Supply Voltage - Min:	1.7 V
Supply Current - Max:	190 mA, 195 mA
Minimum Operating Temperature:	0 C
Maximum Operating Temperature:	+ 70 C
Mounting Style:	SMD/SMT
Package/Case:	TQFP-100
Packaging:	Tray
Brand:	GSI Technology
Memory Type:	SDR
Moisture Sensitive:	Yes
Product Type:	SRAM
Series:	GS8161Z18DGT
Factory Pack Quantity:	18
Subcategory:	Memory & Data Storage
Tradename:	NBT SRAM
Type:	NBT

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Datasheet

GS8161Z18DGT-200V Datasheet (PDF)

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Compliance Codes

CNHTS:: 8542319090
CAHTS:: 8542320041
USHTS:: 8542320041
JPHTS:: 854232029
KRHTS:: 8542321020
TARIC:: 8542324500
MXHTS:: 8542320201
ECCN:: 3A991.b.2.b

Origin Classifications

Country of Origin:: Not available
Assembly Country of Origin:: Not available
Country of Diffusion:: Not available

The country is subject to change at the time of shipment.

NBT SRAMs

GSI Technology NBT SRAMs are 144Mbit and 288Mbit Synchronous Static SRAMs that utilize all available bus bandwidth. The SRAMs achieve this by eliminating the need to insert deselect cycles when the device is switched from read to write cycles. The devices' simplified interface is designed to use a data bus's maximum bandwidth. Because it is a synchronous device, address, data inputs, and read/write control inputs are captured on the rising edge of the input clock.