A3T2GF40CBF-HP

Zentel Japan
155-A3T2GF40CBF-HP
A3T2GF40CBF-HP

Mfr.:

Description:
DRAM DDR3&DDR3L 2Gb, 128Mx16, 1866 at CL13, 1.35V&1.5V, FBGA-96

Datasheet:
ECAD Model:
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Learn more about Zentel Japan A3T2GF40CBF-HP

In Stock: 6

Stock:
6 Can Dispatch Immediately
Factory Lead Time:
16 Weeks Estimated factory production time for quantities greater than shown.
Quantities greater than 6 will be subject to minimum order requirements.
Minimum: 1   Multiples: 1
Unit Price:
Rp-
Ext. Price:
Rp-
Est. Tariff:

Pricing (IDR)

Qty. Unit Price
Ext. Price
Rp135.944 Rp135.944
Rp126.404 Rp1.264.040
Rp122.551 Rp3.063.775
Rp119.616 Rp5.980.800
Rp116.681 Rp11.668.100
Rp113.011 Rp28.252.750
Rp110.076 Rp55.038.000
Rp109.342 Rp109.342.000
2.090 Quote

Product Attribute Attribute Value Select Attribute
Zentel Japan
Product Category: DRAM
RoHS:  
SDRAM - DDR3L
2 Gbit
16 bit
933 MHz
FPGA-96
128 M x 16
1.283 V
1.575 V
0 C
+ 95 C
DDR3(L)
Tray
Brand: Zentel Japan
Moisture Sensitive: Yes
Mounting Style: SMD/SMT
Product Type: DRAM
Factory Pack Quantity: 2090
Subcategory: Memory & Data Storage
Supply Current - Max: 82 mA
Tradename: Zentel Japan
Unit Weight: 234,800 mg
Products found:
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Attributes selected: 0

Datasheet

CNHTS:
8542329000
USHTS:
8542320036
ECCN:
EAR99

DDR3 SDRAM

Zentel DDR3 SDRAM features a high-speed data transfer that is realized by the 8 bits prefetch pipelined architecture. The SDRAM has a double-data-rate architecture with two data transfers per clock cycle. They have a bi-directional differential data strobe (DQS and /DQS) and are transmitted/received with data for capturing data at the receiver. DQS is edge-aligned with data for READs; center-aligned with data for WRITEs. The differential clock inputs (CK and /CK) DLL aligns DQ and DQS transitions with CK transitions.

FEATURED PRODUCTS
ZENTEL JAPAN

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