DK-DEV-5SGSMD5N

Altera
989-DK-DEV-5SGSMD5N
DK-DEV-5SGSMD5N

Mfr.:

Description:
Programmable Logic IC Development Tools FPGA Development Kit For 5SGSMD5K2

Lifecycle:
End of Life:
Scheduled for obsolescence and will be discontinued by the manufacturer.

In Stock: 2

Stock:
2 Can Dispatch Immediately
Factory Lead Time:
2 Weeks Estimated factory production time for quantities greater than shown.
Minimum: 1   Multiples: 1
Unit Price:
Rp-
Ext. Price:
Rp-
Est. Tariff:

Pricing (IDR)

Qty. Unit Price
Ext. Price
Rp128.320.730 Rp128.320.730

Product Attribute Attribute Value Select Attribute
Altera
Product Category: Programmable Logic IC Development Tools
Development Kits
FPGA
5SGSMD5K2F40C2N
Brand: Altera
Description/Function: Stratix V development kit
Interface Type: Ethernet, HSMC, JTAG, QSFP
Operating Supply Voltage: 19 V
Product Type: Programmable Logic IC Development Tools
Series: Stratix V GS Development Kits
Factory Pack Quantity: 1
Subcategory: Development Tools
Tradename: Stratix V FPGA
Part # Aliases: 979999
Unit Weight: 2,642 kg
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By clicking _Buy_ you agree: (1) you are a product or software
developer or system integrator and (2) the kit is for evaluation
only and not for resale.

Please contact a Mouser Technical Sales Representative for
further information.

5-0217-03

CNHTS:
8543709990
USHTS:
8473301180
TARIC:
8473302000
MXHTS:
8473300499
ECCN:
EAR99

DSP Development Kit, Stratix® V Edition

Altera DSP Development Kit, Stratix® V Edition, is a complete design environment with the hardware and software needed to develop Stratix V GS FPGA designs. The designer can test Altera's optimized variable-precision digital signal processing (DSP) block and develop DSP algorithms in a high-level model-based flow. They can test the signal quality of the FPGA transceiver I/Os (10 Gbps+) and develop and test PCI Express® (PCIe) 3.0 designs. The designer can develop and test memory subsystems consisting of SyncFlash, DDR3, and QDR™II+. This development kit allows for developing and testing SDI with the embedded 75ohm 3G SDI transceivers and developing embedded designs utilizing the Nios® II processor and external memory. A designer can develop and test network designs utilizing Triple Speed Ethernet MegaCore®, external RJ-45 jack, and optical networking designs using the 10Gbps and 40Gbps ethernet MAC MegaCores and the QSFP Optical Interface. Using the Clock Control GUI, a designer can also measure the FPGA's power consumption and control twelve different programmable clock oscillators.