NXP LS1021A Series Microprocessors - MPU

Results: 12
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Description Datasheet Availability Pricing (IDR) Filter the results in the table by unit price based on your quantity.
Qty. RoHS ECAD Model Core
Number of Cores
Data Bus Width
Maximum Clock Frequency
Package/Case
L1 Cache Instruction Memory
L1 Cache Data Memory
Operating Supply Voltage
Series
Mounting Style
Minimum Operating Temperature
Maximum Operating Temperature
Packaging
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 800MHz, 0 to 105C, Security enabled
Datasheet
84In Stock
Min.: 1
Mult.: 1

ARM Cortex A7 2 Core 32 bit 800 MHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT 0 C + 105 C Tray
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 800MHz, -40 to 105C, Security enabled
Datasheet
34In Stock
Min.: 1
Mult.: 1

ARM Cortex A7 2 Core 32 bit 800 MHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT - 40 C + 105 C Tray
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.2GHz, -40 to 105C, Security disabled
Datasheet
168In Stock
Min.: 1
Mult.: 1
ARM Cortex A7 2 Core 32 bit 1.2 GHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT - 40 C + 105 C Tray
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.0GHz, 0 to 105C, Security enabled
Datasheet
56In Stock
Min.: 1
Mult.: 1

ARM Cortex A7 2 Core 32 bit 1 GHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT 0 C + 105 C Tray
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 800MHz, -40 to 105C, Security disabled
Datasheet
29In Stock
Min.: 1
Mult.: 1

ARM Cortex A7 2 Core 32 bit 800 MHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT - 40 C + 105 C Tray
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.0GHz, -40 to 105C, Security enabled
Datasheet
168Expected 04/05/2026
Min.: 1
Mult.: 1

ARM Cortex A7 2 Core 32 bit 1 GHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT - 40 C + 105 C Tray
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 800MHz, 0 to 105C, Security disabled
Datasheet
Non-Stocked Lead-Time 26 Weeks
Min.: 1
Mult.: 1

ARM Cortex A7 2 Core 32 bit 800 MHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT 0 C + 105 C Tray
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.0GHz, 0 to 105C, Security disabled
Datasheet
Non-Stocked Lead-Time 26 Weeks
Min.: 1
Mult.: 1

ARM Cortex A7 2 Core 32 bit 1 GHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT 0 C + 105 C Tray
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.2GHz, -40 to 105C, Security enabled
Datasheet
Non-Stocked Lead-Time 26 Weeks
Min.: 1
Mult.: 1
ARM Cortex A7 2 Core 32 bit 1.2 GHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT - 40 C + 105 C Tray
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.0GHz, -40 to 105C, Security disabled
Datasheet
Non-Stocked Lead-Time 26 Weeks
Min.: 84
Mult.: 84

ARM Cortex A7 2 Core 32 bit 1 GHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT - 40 C + 105 C Tray
NXP Semiconductors LS1021ASE7MQB
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.2GHz, 0 to 105C, Security enabled
Datasheet
Non-Stocked Lead-Time 26 Weeks
Min.: 84
Mult.: 84
ARM Cortex A7 2 Core 32 bit 1.2 GHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT 0 C + 105 C Tray
NXP Semiconductors LS1021ASN7MQB
NXP Semiconductors Microprocessors - MPU Layerscape 32-bit Arm Cortex-A7, Dual-core, 1.2GHz, 0 to 105C, Security disabled
Datasheet
Non-Stocked Lead-Time 26 Weeks
Min.: 84
Mult.: 84
ARM Cortex A7 2 Core 32 bit 1.2 GHz FCPBGA-525 32 kB 32 kB 1 V LS1021A SMD/SMT 0 C + 105 C Tray